Developing Parallelization Strategies and Evaluating Portability Layers for High Energy Physics Experiments
Presenter
DescriptionHEP is faced with the untenable prospect of rewriting millions of lines of code, which have been optimized for x86 CPUs, for the increasingly dominant architectures found in computational accelerators such as GPUs. This task is made worse by the architecture specific languages and APIs promoted by manufacturers such as NVIDIA, Intel and AMD. Producing multiple, architecture specific implementations is not a viable scenario, given the available person power and code maintenance issues.
The Portable Parallelization Strategies team of the HEP Center for Computational Excellence is investigating the use of Kokkos, SYCL, OpenMP, std::execution::par and Alpaka as potential portability solutions that promise to execute on multiple architectures from the same source code, using several representative use cases from DUNE, LHC ATLAS and CMS experiments. Central to the project is to develop a list of metrics that evaluate the suitability of each portability layer for the various testbeds. This list includes both subjective ratings, such as the ease of learning the language, and objective criteria such as performance.
We report on the status of these projects, the development and evaluation of the metrics, as well as the interim evaluations of the portability layers for the testbeds under study.
The Portable Parallelization Strategies team of the HEP Center for Computational Excellence is investigating the use of Kokkos, SYCL, OpenMP, std::execution::par and Alpaka as potential portability solutions that promise to execute on multiple architectures from the same source code, using several representative use cases from DUNE, LHC ATLAS and CMS experiments. Central to the project is to develop a list of metrics that evaluate the suitability of each portability layer for the various testbeds. This list includes both subjective ratings, such as the ease of learning the language, and objective criteria such as performance.
We report on the status of these projects, the development and evaluation of the metrics, as well as the interim evaluations of the portability layers for the testbeds under study.
TimeWednesday, June 2912:30 - 13:00 CEST
LocationOsaka Room
Session Chair
Event Type
Minisymposium
Computer Science and Applied Mathematics
Physics