BEGIN:VCALENDAR
VERSION:2.0
PRODID:Linklings LLC
BEGIN:VTIMEZONE
TZID:Europe/Stockholm
X-LIC-LOCATION:Europe/Stockholm
BEGIN:DAYLIGHT
TZOFFSETFROM:+0100
TZOFFSETTO:+0200
TZNAME:CEST
DTSTART:19700308T020000
RRULE:FREQ=YEARLY;BYMONTH=3;BYDAY=-1SU
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:+0200
TZOFFSETTO:+0100
TZNAME:CET
DTSTART:19701101T020000
RRULE:FREQ=YEARLY;BYMONTH=10;BYDAY=-1SU
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTAMP:20220812T074334Z
LOCATION:Foyer 2nd Floor
DTSTART;TZID=Europe/Stockholm:20220628T090000
DTEND;TZID=Europe/Stockholm:20220628T110000
UID:submissions.pasc-conference.org_PASC22_sess181_pos129@linklings.com
SUMMARY:P17 - DisCosTiC: A DSL-based Parallel Simulation Framework using F
 irst-Principles Analytic Performance Models
DESCRIPTION:Poster\n\nP17 - DisCosTiC: A DSL-based Parallel Simulation Fra
 mework using First-Principles Analytic Performance Models\n\nAfzal, Hager,
  Wellein\n\nDisCosTiC (<em>Distributed Cost in Clusters</em>) is a lightwe
 ight message passing simulation toolkit that simulates large-scale applica
 tions by taking the socket-level performance properties of the hardware-so
 ftware interaction into account. It can reproduce and explore the dynamics
  of parallel programs on current and future supercomputers in a well-contr
 olled environment, thereby saving resources and time. In contrast to exist
 ing trace-based simulators, we propose a domain-specific language (DSL) si
 nce traces do not comprise inter-process dependency information and are su
 perimposed by many effects coming from the real system, such as system noi
 se, variations in MPI implementations, etc. DisCosTiC has no dependencies 
 on external libraries and uses analytical, first-principle models for exec
 ution and communication time predictions, taking socket-level bandwidth co
 ntention into account. For the execution part, it supports Roofline and EC
 M (execution-cache-memory) models, while communication is covered by Hockn
 ey and LogGOPS models. The structure of the parallel program is formulated
  within the DSL, and a configuration file holds hardware attributes. The r
 esulting simulated traces can be visualized via Chromium’s Trace Event Pro
 filing tool. In the simulator design, we tried to find a trade-off among m
 odeling complexity, simulation accuracy, and user-friendliness.
END:VEVENT
END:VCALENDAR